전자부품 데이터시트 검색엔진 |
|
932SQ426AKLFT 데이터시트(PDF) 3 Page - Integrated Device Technology |
|
932SQ426AKLFT 데이터시트(HTML) 3 Page - Integrated Device Technology |
3 / 25 page 932SQ426 CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING IDT® CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING 3 932SQ426 REV C 022916 Pin Descriptions (TSSOP) PIN # PIN NAME TYPE DESCRIPTION 1 SMBCLK IN Clock pin of SMBUS circuitry, 5V tolerant 2 GND14 PWR Ground pin for 14MHz output and logic. 3 AVDD14 PWR Analog power pin for 14MHz PLL 4 VDD14 PWR Power pin for 14MHz output and logic 5 vREF14_3x/TEST_SEL I/O 14.318 MHz reference clock. 3X drive strength as default / TEST_SEL latched input to enable test mode. Refer to Test Clarification Table. This pin has a weak (~120Kohm) internal pull down. 6 GND14 PWR Ground pin for 14MHz output and logic. 7 GNDXTAL PWR Ground pin for Crystal Oscillator. 8 X1_25 IN Crystal input, Nominally 25.00MHz. 9 X2_25 OUT Crystal output, Nominally 25.00MHz. 10 VDDXTAL PWR 3.3V power for the crystal oscillator. 11 GNDPCI PWR Ground pin for PCI outputs and logic. 12 VDDPCI PWR 3.3V power for the PCI outputs and logic 13 PCI4_2x OUT 3.3V PCI clock output 14 PCI3_2x OUT 3.3V PCI clock output 15 PCI2_2x OUT 3.3V PCI clock output 16 PCI1_2x OUT 3.3V PCI clock output 17 PCI0_2x OUT 3.3V PCI clock output 18 GNDPCI PWR Ground pin for PCI outputs and logic. 19 VDDPCI PWR 3.3V power for the PCI outputs and logic 20 VDD48 PWR 3.3V power for the 48MHz output and logic 21 48M_2x OUT 3.3V 48MHz output 22 GND48 PWR Ground pin for 48MHz output and logic. 23 GND96 PWR Ground pin for DOT96 output and logic. 24 DOT96T OUT True clock of differential 96MHz output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 25 DOT96C OUT Complementary clock of differential 96MHz output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 26 AVDD96 PWR 3.3V power for the 48/96MHz PLL and the 96MHz output and logic 27 TEST_MODE IN TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to Test Clarification Table. 28 CKPWRGD#/PD IN CKPWRGD# is an active low input used to sample latched inputs and allow the device to Power Up. PD is an asynchronous active high input pin used to put the device into a low power state. The internal clocks and PLLs are stopped. 29 VDDSRC PWR 3.3V power for the SRC outputs and logic 30 SRC0T OUT True clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 31 SRC0C OUT Complementary clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 32 GNDSRC PWR Ground pin for SRC outputs and logic. 33 SRC1C OUT Complementary clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 34 SRC1T OUT True clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 35 SRC2C OUT Complementary clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 36 SRC2T OUT True clock of differential SRC output. These are current mode outputs and external series resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific values. 37 VDDSRC PWR 3.3V power for the SRC outputs and logic 38 AVDD_SRC PWR 3.3V power for the SRC PLL analog circuits 39 GNDSRC PWR Ground pin for SRC outputs and logic. 40 IREF OUT This pin establishes the reference current for the differential current-mode output pairs. This pin requires a fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the standard value. |
유사한 부품 번호 - 932SQ426AKLFT |
|
유사한 설명 - 932SQ426AKLFT |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |