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MC74VHCT374ADWRG 데이터시트(PDF) 2 Page - ON Semiconductor |
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MC74VHCT374ADWRG 데이터시트(HTML) 2 Page - ON Semiconductor |
2 / 7 page MC74VHCT374A http://onsemi.com 2 Figure 1. Logic Diagram DATA INPUTS D0 D1 D2 D3 D4 D5 D6 D7 18 17 14 13 8 7 4 3 1 OE 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 16 15 12 9 6 5 2 NONINVERTING OUTPUTS 11 CP Figure 2. Pin Assignment Q2 D1 D0 Q0 OE GND Q3 D3 D2 Q1 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 Q6 D6 D7 Q7 VCC CP Q4 D4 D5 Q5 MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage – 0.5 to + 7.0 V Vin DC Input Voltage – 0.5 to + 7.0 V Vout DC Output Voltage Outputs in 3−State High or Low State – 0.5 to + 7.0 – 0.5 to VCC + 0.5 V IIK Input Diode Current − 20 mA IOK Output Diode Current (VOUT < GND; VOUT > VCC) ± 20 mA Iout DC Output Current, per Pin ± 25 mA ICC DC Supply Current, VCC and GND Pins ± 75 mA PD Power Dissipation in Still Air, SOIC Package† TSSOP Package† 500 450 mW Tstg Storage Temperature – 65 to + 150 _C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. †Derating − SOIC Packages: – 7 mW/ _C from 65_ to 125_C TSSOP Package: − 6.1 mW/ _C from 65_ to 125_C RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC DC Supply Voltage 4.5 5.5 V Vin DC Input Voltage 0 5.5 V Vout DC Output Voltage Outputs in 3−State High or Low State 0 0 5.5 VCC V TA Operating Temperature − 40 + 85 _C tr, tf Input Rise and Fall Time VCC =5.0V ±0.5V 0 20 ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance cir- cuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. |
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