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LM321 데이터시트(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
부품명 LM321
상세설명  Low Power Single Op Amp
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM321 데이터시트(HTML) 3 Page - National Semiconductor (TI)

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Electrical Characteristics Unless otherwise specified, all limits guaranteed for at T
A = 25˚C; V
+ = 5V, V=
0V, V
O = 1.4V. Boldface limits apply at temperature extremes. (Continued)
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
THD
Total Harmonic Distortion
f = 1kHz, A
V = 20dB
R
L =2kΩ,VO =2VPP,
C
L = 100pF, V
+ = 30V
0.015
%
e
n
Equivalent Input Noise Voltage
f = 1kHz, R
S = 100Ω
V
+ = 30V
40
nV/
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Short circuits from the output V+ can cause excessive heating and eventual destruction. When considering short circuits to ground the maximum output
current is approximately 40mA independent of the magnitude of V+. At values of supply voltage in excess of +15V, continuous short circuits can exceed the power
dissipation ratings and cause eventual destruction.
Note 3: The maximum power dissipation is a function of TJ(MAX), θJA , and TA. The maximum allowable power dissipation at any ambient temperature is
PD =(TJ(MAX) -TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
Note 4: Typical values represent the most likely parametric norm.
Note 5: All limits are guaranteed by testing or statistical analysis.
Note 6: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector base junction of the input PNP
transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action
on the IC chip. This transistor action can cause the output voltages of the op amps to go to the V+ voltage level (or to ground for a large overdrive) for the time
duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns
to a value greater than −0.36V (at 25˚C).
Note 7: VO ≅ 1.4V, RS =0Ω with V
+ from 5V to 30V; and over the full input common-mode range (0V to V+ - 1.5V) at 25˚C.
Note 8: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the outputso
no loading change exists on the input lines.
Note 9: The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V (at 25˚C). The upper end of the
common-mode voltage range is V+ - 1.5V at 25˚C, but either or both inputs can go to +32V without damage, independent of the magnitude of V+.
Note 10: Human Body Model, 1.5k
Ω in series with 100pF.
Simplified Schematic
20007603
www.national.com
3


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