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LAN9117 데이터시트(HTML) 51 Page - Microchip Technology

부품명 LAN9117
상세내용  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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제조사  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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LAN9117 데이터시트(HTML) 51 Page - Microchip Technology

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 2005-2016 Microchip Technology Inc.
DS00002267A-page 51
LAN9117
4.0
INTERNAL ETHERNET PHY
4.1
Top Level Functional Description
Functionally, the internal PHY can be divided into the following sections:
• 100Base-TX transmit and receive
• 10Base-T transmit and receive
• Internal MII interface to the Ethernet Media Access Controller
• Auto-negotiation to automatically determine the best speed and duplex possible
• Management Control to read status registers and write control registers
4.2
100Base-TX Transmit
The data path of the 100Base-TX is shown in Figure 4-1. Each major block is explained below.
4.2.1
4B/5B ENCODING
The transmit data passes from the MII block to the 4B/5B encoder. This block encodes the data from 4-bit nibbles to 5-
bit symbols (known as “code-groups”) according to Table 4-1. Each 4-bit data-nibble is mapped to 16 of the 32 possible
code-groups. The remaining 16 code-groups are either used for control information or are not valid.
The first 16 code-groups are referred to by the hexadecimal values of their corresponding data nibbles, 0 through F. The
remaining code-groups are given letter designations with slashes on either side. For example, an IDLE code-group is
/I/, a transmit error code-group is /H/, etc.
The encoding process may be bypassed by clearing bit 6 of register 31. When the encoding is bypassed the 5th transmit
data bit is equivalent to TX_ER.
FIGURE 4-1:
100BASE-TX DATA PATH
MAC
Tx
Driver
MLT-3
Converter
NRZI
Converter
4B/5B
Encoder
Magnetics
CAT-5
RJ45
100M
PLL
Internal
MII 25 MHz by 4 bits
TX_CLK
25MHz by
5 bits
NRZI
MLT-3
MLT-3
MLT-3
MLT-3
Scrambler
and PISO
125 Mbps Serial
MII
25MHz
by 4 bits


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