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LAN9117 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 58 Page - Microchip Technology

๋ถ€ํ’ˆ๋ช… LAN9117
์ƒ์„ธ๋‚ด์šฉ  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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LAN9117 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 58 Page - Microchip Technology

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LAN9117
DS00002267A-page 58
๏ƒฃ 2005-2016 Microchip Technology Inc.
5.0
REGISTER DESCRIPTION
The following section describes all LAN9117 registers and data ports.
Note 5-1
The LAN9117 host bus interface supports 16-bit bus transfers; internally, all data paths are 32-bits
wide. Figure 5-1 describes the memory map with respect to pairs of atomic 16-bit transactions.
FIGURE 5-1:
LAN9117 MEMORY MAP
MACCSRPort
A4h
B0h
Base +
00h
RESERVED
B4h
A0h
RX Data FIFO Port
TX Data FIFO Port
RX Status FIFO Port
40h
20h
50h
FCh
EEPROMPort
04h
1Ch
RX Data FIFO Alias Ports
24h
3Ch
TX Data FIFO Alias Ports
RX Status FIFO PEEK
44h
TX Status FIFO Port
48h
TX Status FIFO PEEK
4Ch
A8h
ACh


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