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LAN9117 데이터시트(PDF) 79 Page - Microchip Technology

부품명 LAN9117
부품 상세설명  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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 2005-2016 Microchip Technology Inc.
DS00002267A-page 79
LAN9117
5.3.24
E2P_DATA – EEPROM DATA REGISTER
This register is used in conjunction with the E2P_CMD register to perform read and write operations with the Serial
EEPROM
5.4
MAC Control and Status Registers
These registers are located in the MAC module and are accessed indirectly through the MAC-CSR synchronizer port.
Table 5-6, "LAN9117 MAC CSR Register Map", shown below, lists the MAC registers that are accessible through the
indexing method using the MAC_CSR_CMD and MAC_CSR_DATA registers (see sections MAC_CSR_CMD – MAC
CSR Synchronizer Command Register and MAC_CSR_DATA – MAC CSR Synchronizer Data Register).
9
EPC Time-out. If an EEPROM operation is performed, and there is no
response from the EEPROM within 30mS, the EEPROM controller will time-
out and return to its idle state. This bit is set when a time-out occurs
indicating that the last operation was unsuccessful.
Note:
If the EEDIO signal pin is externally pulled-high, EPC commands
will not time out if the EEPROM device is missing. In this case the
EPC Busy bit will be cleared as soon as the command sequence
is complete. It should also be noted that the ERASE, ERAL,
WRITE and WRAL commands are the only EPC commands that
will time-out if an EEPROM device is not present -and- the EEDIO
signal is pulled low
R/WC
0
8
MAC Address Loaded. When set, this bit indicates that a valid EEPROM
was found, and that the MAC address programming has completed normally.
This bit is set after a successful load of the MAC address after power-up, or
after a RELOAD command has completed
RO
-
7-0
EPC Address. The 8-bit value in this field is used by the EEPROM
Controller to address the specific memory location in the Serial EEPROM.
This is a Byte aligned address.
R/W
00h
Offset:
B4h
Size:
32 bits
Bits
Description
Type
Default
31-8
Reserved.
RO
-
7:0
EEPROM Data. Value read from or written to the EEPROM.
R/W
00h
TABLE 5-6:
LAN9117 MAC CSR REGISTER MAP
MAC Control and Status Registers
Index
Symbol
Register Name
Default
1MAC_CR
MAC Control Register
00040000h
2
ADDRH
MAC Address High
0000FFFFh
3
ADDRL
MAC Address Low
FFFFFFFFh
4
HASHH
Multicast Hash Table High
00000000h
5
HASHL
Multicast Hash Table Low
00000000h
6MII_ACC
MII Access
00000000h
7MII_DATA
MII Data
00000000h
8FLOW
Flow Control
00000000h
Bits
Description
Type
Default


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