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LAN9117 데이터시트(HTML) 80 Page - Microchip Technology

부품명 LAN9117
상세내용  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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LAN9117 데이터시트(HTML) 80 Page - Microchip Technology

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LAN9117
DS00002267A-page 80
 2005-2016 Microchip Technology Inc.
5.4.1
MAC_CR—MAC CONTROL REGISTER
This register establishes the RX and TX operation modes and controls for address filtering and packet filtering.
9VLAN1
VLAN1 Tag
00000000h
AVLAN2
VLAN2 Tag
00000000h
BWUFF
Wake-up Frame Filter
00000000h
CWUCSR
Wake-up Control and Status
00000000h
Offset:
1
Attribute:
R/W
Default Value:
00040000h
Size:
32 bits
Bits
Description
31
Receive All Mode (RXALL). When set, all incoming packets will be received and passed on to the
address filtering Function for processing of the selected filtering mode on the received frame. Address
filtering then occurs and is reported in Receive Status. When reset, only frames that pass Destination
Address filtering will be sent to the Application.
30-24
Reserved
23
Disable Receive Own (RCVOWN). When set, the MAC disables the reception of frames when the
MII TX_EN signal is asserted. The MAC blocks the transmitted frame on the receive path. When reset,
the MAC receives all packets the PHY gives, including those transmitted by the MAC.This bit should
be reset when the Full Duplex Mode bit is set.
22
Reserved
21
Loopback operation Mode (LOOPBK). Selects the loop back operation modes for the MAC. This is
only for full duplex mode
1’b0: Normal: No feedback
1’b1: Internal: Through MII
In internal loopback mode, the TX frame is received by the Internal MII interface, and sent back to the
MAC without being sent to the PHY.
Note:
When enabling or disabling the loopback mode it can take up to 10
s for the mode change
to occur. The transmitter and receiver must be stopped and disabled when modifying the
LOOPBK bit. The transmitter or receiver should not be enabled within10
s of modifying the
LOOPBK bit.
20
Full Duplex Mode (FDPX). When set, the MAC operates in Full-Duplex mode, in which it can transmit
and receive simultaneously. In Full-Duplex mode, the heartbeat check is disabled and the heartbeat
fail status should thus be ignored.
19
Pass All Multicast (MCPAS). When set, indicates that all incoming frames with a Multicast destination
address (first bit in the destination address field is 1) are received. Incoming frames with physical
address (Individual Address/Unicast) destinations are filtered and received only if the address matches
the MAC Address.
18
Promiscuous Mode (PRMS). When set, indicates that any incoming frame is received regardless of
its destination address.
17
Inverse filtering (INVFILT). When set, the address check Function operates in Inverse filtering mode.
This is valid only during Perfect filtering mode.
16
Pass Bad Frames (PASSBAD). When set, all incoming frames that passed address filtering are
received, including runt frames and collided frames.
15
Hash Only Filtering mode (HO). When set, the address check Function operates in the Imperfect
Address Filtering mode both for physical and multicast addresses
TABLE 5-6:
LAN9117 MAC CSR REGISTER MAP (CONTINUED)
MAC Control and Status Registers
Index
Symbol
Register Name
Default


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