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LAN9117 데이터시트(PDF) 88 Page - Microchip Technology

부품명 LAN9117
부품 상세설명  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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LAN9117 데이터시트(HTML) 88 Page - Microchip Technology

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LAN9117
DS00002267A-page 88
 2005-2016 Microchip Technology Inc.
5.5
PHY Registers
The PHY registers are not memory mapped. These registers are accessed indirectly through the MAC via the MII_ACC
and MII_DATA registers. An index must be used to access individual PHY registers. PHY Register Indexes are shown
in Table 5-8, "LAN9117 PHY Control and Status Register"below.
5.5.1
BASIC CONTROL REGISTER
Note:
The NASR (Not Affected by Software Reset) designation is only applicable when bit 15 of the PHY Basic
Control Register (Reset) is set.
TABLE 5-8:
LAN9117 PHY CONTROL AND STATUS REGISTER
PHY Control and Status Registers
Index
(In Decimal)
Register Name
0
Basic Control Register
1
Basic Status Register
2
PHY Identifier 1
3
PHY Identifier 2
4
Auto-Negotiation Advertisement Register
5
Auto-Negotiation Link Partner Ability Register
6
Auto-Negotiation Expansion Register
17
Mode Control/Status Register
18
Special Modes Register
27
Special Control/Status Indications
29
Interrupt Source Register
30
Interrupt Mask Register
31
PHY Special Control/Status Register
Index (In Decimal):
0
Size:
16-bits
Bits
Description
Type
Default
15
Reset. 1 = software reset. Bit is self-clearing. For best results, when setting
this bit do not set other bits in this register.
RW/SC
0
14
Loopback. 1 = loopback mode, 0 = normal operation
RW
0
13
Speed Select. 1 = 100Mbps, 0 = 10Mbps. Ignored if Auto Negotiation is
enabled (0.12 = 1).
RW
See Note 5-2
12
Auto-Negotiation Enable. 1 = enable auto-negotiate process (overrides
0.13 and 0.8) 0 = disable auto-negotiate process.
RW
See Note 5-2
11
Power Down. 1 = General power down-mode, 0 = normal operation.
Note:
After this bit is cleared, the PHY may auto-negotiate with it's part-
ner station. This process may take a few seconds to complete.
Once auto-negotiation is complete, bit 5 of the PHY's Basic Status
Register will be set.
RW
0
10
Reserved
RO
0
9
Restart Auto-Negotiate. 1 = restart auto-negotiate process 0 = normal
operation. Bit is self-clearing.
RW/SC
0


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