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LAN9117 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 89 Page - Microchip Technology

๋ถ€ํ’ˆ๋ช… LAN9117
์ƒ์„ธ๋‚ด์šฉ  High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
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LAN9117 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 89 Page - Microchip Technology

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DS00002267A-page 89
LAN9117
Note 5-2
This default value of this bit is determined by Pin 74 "SPEED_SEL". Please refer to the pin
description section for more details
5.5.2
BASIC STATUS REGISTER
5.5.3
PHY IDENTIFIER 1
8
Duplex Mode. 1 = full duplex, 0 = half duplex. Ignored if Auto Negotiation is
enabled (0.12 = 1).
RW
0
7
Collision Test. 1 = enable COL test, 0 = disable COL test
RW
0
6-0
Reserved
RO
0
Index (In Decimal):
1
Size:
16-bits
Bits
Description
Type
Default
15
100Base-T4. 1 = T4 able, 0 = no T4 ability
RO
0
14
100Base-TX Full Duplex. 1 = TX with full duplex, 0 = no TX full duplex
ability.
RO
1
13
100Base-TX Half Duplex. 1 = TX with half duplex, 0 = no TX half duplex
ability.
RO
1
12
10Base-T Full Duplex. 1 = 10Mbps with full duplex 0 = no 10Mbps with full
duplex ability
RO
1
11
10Base-T Half Duplex. 1 = 10Mbps with half duplex 0 = no 10Mbps with
half duplex ability
RO
1
10-6
Reserved
RO
0
5
Auto-Negotiate Complete. 1 = auto-negotiate process completed 0 = auto-
negotiate process not completed
RO
0
4
Remote Fault. 1 = remote fault condition detected 0 = no remote fault
RO/LH
0
3
Auto-Negotiate Ability. 1 = able to perform auto-negotiation function 0 =
unable to perform auto-negotiation function
RO
1
2
Link Status. 1 = link is up, 0 = link is down
RO/LL
0
1
Jabber Detect. 1 = jabber condition detected 0 = no jabber condition
detected
RO/LH
0
0
Extended Capabilities. 1 = supports extended capabilities registers 0 =
does not support extended capabilities registers.
RO
1
Index (In Decimal):
2
Size:
16-bits
Bits
Description
Type
Default
15-0
PHY ID Number. Assigned to the 3rd through 18th bits of the
Organizationally Unique Identifier (OUI), respectively.
RO
0x0007h
Bits
Description
Type
Default


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