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MC145425P 데이터시트(PDF) 4 Page - Motorola, Inc |
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MC145425P 데이터시트(HTML) 4 Page - Motorola, Inc |
4 / 16 page MC145421 •MC145425 MOTOROLA 4 ABSOLUTE MAXIMUM RATINGS (Voltage Referenced to VSS) Rating Symbol Value Unit DC Supply Voltage VDD – VSS – 0.5 to 6.5 V Voltage Any Pin to VSS V – 0.5 to VDD + 0.5 V DC Current, Any Pin (Excluding VDD, VSS) I ± 10 mA Operating Temperature TA – 40 to + 85 °C Storage Temperature Tstg – 85 to + 150 °C RECOMMENDED OPERATING CONDITIONS (TA = – 40 to + 85°C) Parameter Pins Min Typ Max Unit DC Supply Voltage VDD 4.5 5.0 5.5 V Frame Rate MC145421 (See Note) MSI — 8.0 — kHz MC145421/25 Frame Slip Rate (See Note) — — — 0.25 % CCI Clock Frequency — — 8.192 8.29 MHz TDC/RDC Data Clocks (for Master) — 0.128 — 4.1 MHz DCLK — 0.016 — 4.1 MHz Modulation Baud Rate (CCI/16) LO1, LO2 — 512 — kHz NOTE: The slave’s crystal frequency divided by 1024 must equal the master’s MSI frequency ± 0.25% for optimum operation. Also, the 8.192 MHz input at the master divided by 1024 must be within 0.048% of the master’s 8 kHz MSI clock frequency. DIGITAL CHARACTERISTICS (VDD = 5 V, TA = – 40 to + 85°C) Parameter Min Max Unit Input High Level 3.5 — V Input Low Level — 1.5 V Input Current, VDD — 15 mA Input Current (Digital Pins) — 5 µA Input Capacitance — 10 pF Output High Current (Except Tx on Master and Slave, and PD on the Slave) VOH = 2.5 VOH = 4.6 – 1.7 – 0.36 — — mA Tx Output High Current VOH = 2.5 VOH = 4.6 – 3.4 – 0.7 — — mA PD (Slave) Output High Current (See Note) VOH = 2.5 — – 90 µA Output Low Current (Except Tx on Master and Slave, and PD on Slave) VOL = 0.4 VOL = 0.8 0.36 0.8 — — mA Tx Output Low Current VOL = 0.4 VOL = 0.8 1.7 3.5 — — mA PD (Slave) Output Low Current (See Note) VOL = 0.4 30 60 µA Tx Three–State Impedance 100 — k Ω XTL Output High Current VOH = 4.6 — – 450 µA XTL Output Low Current VOH = 0.4 450 — µA NOTE: To overdrive PD from a low level to 3.5 V, or a high level to 1.5 V requires a minimum of ± 800 µA drive capability. ANALOG CHARACTERISTICS (VDD = 5 V, TA = 0 to 70°C) Parameter Min Max Unit Modulation Differential Amplitude RL = 880 Ω (LO1 – LO2) 4.6 — Vpeak Modulation Differential DC Offset — 40 mV Vref Voltage (Typically 9/20 S (VDD – VSS)) 2.0 2.5 V PCM Tone Level – 22 – 18 dBm Demodulator Input Amplitude 50 — mVpeak Demodulator Input Impedance (LI to Vref) 75 300 k Ω This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid applications of any voltage higher than maximum rated voltages to this high imped- ance circuit. For proper operation it is recom- mended that Vin and Vout be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g., either VSS or VDD). |
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