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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SL28PCIE50 데이터시트(PDF) 1 Page - Silicon Laboratories |
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SL28PCIE50 데이터시트(HTML) 1 Page - Silicon Laboratories |
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1 / 17 page  EProClock® Generator SL28PCIe50 DOC#: SP-AP-0758 (Rev. AA) Page 1 of 16 400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500 1+(512) 416-9669 www.silabs.com Features • PCI-Express Gen 2 Compliant • Low power push-pull type differential output buffers • Integrated resistors on all differential outputs • Dedicated Output Enable pin for all outputs • Dedicated SRC Bank Enable HW pin • Scalable VDD_IO support 1.05V to 3.3V • Five 100MHz Differential PCIe Gen 2 clocks • Two Configurable Single-Ended Clocks • Three Buffered Reference Clock 25MHz • 25MHz Crystal Input or Clock input • EProClock® Programmable Technology •I2C support with readback capabilities • Triangular Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 3.3V Power supply • 48-pin QFN package SRC 25M CONF_SE1 CONF_SE2 x5 x3 x1 x1 Block Diagram Pin Configuration * Internal 100K-ohm pull-up resistor ** Internal 100K-ohm pull down resistor |
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유사한 설명 - SL28PCIE50 |
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