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ADRF5021 데이터시트(PDF) 10 Page - Analog Devices

부품명 ADRF5021
상세설명  Silicon SPDT Switch
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홈페이지  http://www.analog.com
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ADRF5021 데이터시트(HTML) 10 Page - Analog Devices

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ADRF5021
Data Sheet
Rev. A | Page 10 of 12
APPLICATIONS INFORMATION
EVALUATION BOARD
Figure 18 and Figure 19 show the top and cross sectional views
of the evaluation board, which uses 4-layer construction with a
copper thickness of 0.5 oz (0.7 mil) and dielectric materials
between each copper layer.
1500mil
40mil
40mil
EDGE PLATING 5 × 520mil
570mil
R 32mil
Figure 18. Evaluation Board Layout (Top View)
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil)
0.5oz Cu (0.7mil)
RO4003
FR4
FR4
0.5oz Cu (0.7mil)
W = 14mil
G = 5mil
T = 0.7mil
H = 8mil
Figure 19. Evaluation Board (Cross Sectional View)
All RF and dc traces are routed on the top copper layer whereas
the inner and bottom layers are grounded planes that provide
a solid ground for the RF transmission lines. Top dielectric
material is 8 mil Rogers RO4003, offering good high frequency
performance. The middle and bottom dielectric materials are
FR-4 type materials to achieve an overall board thickness of
62 mil.
The RF transmission lines were designed using a coplanar
waveguide (CPWG) model with a width of 14 mil and ground
spacing of 5 mil to have a characteristic impedance of 50 Ω. For
good RF and thermal grounding, as many plated through vias
as possible are arranged around transmission lines and under
the exposed pad of the package.
Figure 20 shows the actual ADRF5021 evaluation board with
component placement. Two power supply ports are connected
to the VDD and VSS test points, TP5 and TP2, and the ground
reference is connected to the GND test point, TP1. On each
supply trace, a 100 pF bypass capacitor is used, and unpopulated
components positions are available for applying extra bypass
capacitors.
Figure 20. Populated Evaluation Board
Two control ports are connected to the EN and CTRL test
points, TP3 and TP4. On each control trace, a resistor position
is available to improve the isolation between the RF and control
signals. The RF ports are connected to the RFC, RF1, and RF2
connectors (J1, J2, and J3) that are end launch 2.4 mm RF
connectors. A through transmission line that connects
unpopulated RF connectors (J7 and J8) is also available to
measure the loss of the PCB. Figure 21 and Table 5 are the
evaluation board schematic and bill of materials, respectively.
The evaluation board shown in Figure 20 is available from
Analog Devices, Inc., upon request.


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