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ADF4355-3BCPZ-RL7 데이터시트(PDF) 3 Page - Analog Devices |
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ADF4355-3BCPZ-RL7 데이터시트(HTML) 3 Page - Analog Devices |
3 / 35 page ADF4355-3 Data Sheet Rev. A | Page 2 of 34 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 6 Transistor Count........................................................................... 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 9 Theory of Operation ...................................................................... 12 Reference Input Section............................................................. 12 RF N Divider............................................................................... 12 Phase Frequency Detector (PFD) and Charge Pump............ 13 MUXOUT and Lock Detect...................................................... 13 Input Shift Registers................................................................... 13 Program Modes .......................................................................... 14 VCO.............................................................................................. 14 Output Stage................................................................................ 14 Loop Filter ................................................................................... 14 Register Maps.................................................................................. 16 Register 0 ..................................................................................... 18 Register 1 ..................................................................................... 19 Register 2 ..................................................................................... 20 Register 3 ..................................................................................... 21 Register 4 ..................................................................................... 22 Register 5 ..................................................................................... 23 Register 6 ..................................................................................... 24 Register 7 ..................................................................................... 26 Register 8 ..................................................................................... 27 Register 9 ..................................................................................... 27 Register 10................................................................................... 28 Register 11................................................................................... 28 Register 12................................................................................... 29 Register Initialization Sequence ............................................... 29 Frequency Update Sequence..................................................... 30 RF Synthesizer—A Worked Example ...................................... 30 Reference Doubler and Reference Divider ............................. 30 Spurious Optimization and Fast Lock..................................... 31 Optimizing Jitter......................................................................... 31 Spur Mechanisms ....................................................................... 31 Lock Time.................................................................................... 31 Applications Information .............................................................. 32 Direct Conversion Modulator .................................................. 32 Power Supplies............................................................................ 33 Printed Circuit Board (PCB) Design Guidelines for a Chip- Scale Package .............................................................................. 33 Output Matching........................................................................ 33 Outline Dimensions....................................................................... 34 Ordering Guide .......................................................................... 34 REVISION HISTORY 1/16—Rev. 0 to Rev. A Change to Integrated RMS Jitter Parameter, Unit Column, Table 1 ................................................................................................ 4 Changes to Reference Input Section ............................................ 12 Changes to Table 6.......................................................................... 15 Changes to Figure 25...................................................................... 17 Changes to Reference Mode Section............................................ 23 Changes to Negative Bleed Section .............................................. 24 Changes to Charge Pump Bleed Current Section ...................... 25 Changes to Figure 34, Figure 35, and Register 8 Section .......... 27 Changes to Figure 37 and Register 11 Section............................ 28 7/15—Revision 0: Initial Version |
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