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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADP-I2C-USB-Z 데이터시트(PDF) 8 Page - Analog Devices |
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ADP-I2C-USB-Z 데이터시트(HTML) 8 Page - Analog Devices |
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8 / 93 page  Data Sheet ADP1050 Parameter Symbol Min Typ Max Unit Test Conditions/Comments SERIAL BUS TIMING See Figure 2 Clock Operating Frequency 10 100 400 kHz Glitch Immunity 50 ns Bus Free Time tBUF 1.3 µs Between stop and start conditions Start Setup Time tSU;STA 0.6 µs Repeated start condition setup time Start Hold Time tHD;STA 0.6 µs Hold time after repeated start condition; after this period, the first clock is generated Stop Setup Time tSU;STO 0.6 µs SDA Setup Time tSU;DAT 100 ns SDA Hold Time tHD;DAT 125 ns For readback 300 ns For write SCL Low Timeout tTIMEOUT 25 35 ms SCL Low Time tLOW 0.6 µs SCL High Time tHIGH 0.6 µs SCL Low Extended Time tLOW;SEXT 25 ms SCL, SDA Rise Time tR 20 300 ns SCL, SDA Fall Time tF 20 300 ns EEPROM EEPROM Update Time 40 ms Time from the update command to completion of the EEPROM update Reliability Endurance2 10,000 Cycles TJ = 85°C 1000 Cycles TJ = 125°C Data Retention3 20 Years TJ = 85°C 15 Years TJ = 125°C 1 CS3 is an alternative output current reading that is calculated by the CS1 reading (representing input current), duty cycle, and the main transformer turns ratio. 2 Endurance is qualified as per JEDEC Standard 22, Method A117, and is measured at −40°C, +25°C, +85°C, and +125°C. 3 Retention lifetime equivalent at junction temperature as per JEDEC Standard 22, Method A117. TIMING DIAGRAM SCL SDA P S tBUF tHD;STA tHD;DAT tHIGH tSU;DAT tHD;STA tSU;STA tSU;STO tLOW tR tF S P Figure 2. Serial Bus Timing Diagram Rev. A | Page 7 of 92 |
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