전자부품 데이터시트 검색엔진 |
|
DAC8775IRWFT 데이터시트(PDF) 6 Page - Texas Instruments |
|
|
DAC8775IRWFT 데이터시트(HTML) 6 Page - Texas Instruments |
6 / 81 page 6 DAC8775 SLVSBY7 – FEBRUARY 2017 www.ti.com Product Folder Links: DAC8775 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Input voltage PVDD_x/AVDD to PBKG -0.3 40 V PVSS_x/REFGND/DCDC_AGND_x/DAC_AGND_x to PBKG -0.3 0.3 VPOS_IN_x to VNEG_IN_x -0.3 40 VPOS_IN_x to PBKG -0.3 33 VNEG_IN_x to PBKG -20 0.3 VSENSEN_x to PBKG VNEG_IN_x VPOS_IN_x VSENSEP_x to PBKG VNEG_IN_x VPOS_IN_x DVDD to PBKG -0.3 6 REFOUT/REFIN to PBKG -0.3 6 Digital input voltage to PBKG -0.3 DVDD+0.3 Output voltage VOUT_x to PBKG VNEG_IN_x VPOS_IN_x V IOUT_x to PBKG VNEG_IN_x VPOS_IN_x SDO, ALARM to PBKG -0.3 DVDD+0.3 Input current Current into any digital input pin -10 10 mA Power dissipation (TJmax – TA)/θJA W Operating junction temperature, TJ -40 150 °C Junction temperature range, TJmax 150 Storage temperature, Tstg -65 150 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22- C101, all pins(2) ±500 (1) The minimum headroom spec for voltage output stage and the compliance voltage for current output stage should be met. When Buck- Boost converter is enabled VPOS_IN_x/VNEG_IN_x are generated internally to meet headroom and compliance specs. When Buck- Boost converter is disabled VPOS_IN_x, AVDD, and PVDD must be tied together. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT POWER SUPPLY PVDD_x/AVDD_x to PBKG/PVSS_x(1) Positive supply voltage to ground range 12 36 V VPOS_IN_x to PBKG(1) Positive supply voltage to ground range 12 33 V VNEG_IN_x to PBKG(1) Negative supply voltage to substrate for current output mode -18 0 V Negative supply voltage to substrate for voltage output mode -18 -5 V VPOS_IN_x to VNEG_IN_x(1) 12 36 V VSENSEN_x to PBKG The minimum headroom spec for voltage output stage must be met -7 7 V |
유사한 부품 번호 - DAC8775IRWFT |
|
유사한 설명 - DAC8775IRWFT |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |