전자부품 데이터시트 검색엔진 |
|
AD5432 데이터시트(PDF) 2 Page - Analog Devices |
|
AD5432 데이터시트(HTML) 2 Page - Analog Devices |
2 / 24 page REV. 0 –2– AD5426/AD5432/AD5443–SPECIFICATIONS1 (VDD = 3 V to 5.5 V, VREF = 10 V, IOUTx = O V. All specifications TMIN to TMAX, unless otherwise noted. DC performance measured with OP177, AC performance with AD8038, unless otherwise noted.) Parameter Min Typ Max Unit Conditions STATIC PERFORMANCE AD5426 Resolution 8 Bits Relative Accuracy ±0.25 LSB Differential Nonlinearity ±0.5 LSB Guaranteed monotonic AD5432 Resolution 10 Bits Relative Accuracy ±0.5 LSB Differential Nonlinearity ±1 LSB Guaranteed monotonic AD5443 Resolution 12 Bits Relative Accuracy ±1 LSB Differential Nonlinearity –1/+2 LSB Guaranteed monotonic Gain Error ±10 mV Gain Error Temperature Coefficient 2 ±5 ppm FSR/ °C Output Leakage Current ±5nA Data = 0x0000, TA = 25 °C, I OUT ±25 nA Data = 0x0000, IOUT REFERENCE INPUT 2 Reference Input Range ±10 V VREF Input Resistance 8 10 12 k Ω Input resistance TC = –50 ppm/ °C RFB Resistance 8 10 12 k Ω Input resistance TC = –50 ppm/ °C Input Capacitance Code All 0s 3 6 pF Code All 1s 5 8 pF DIGITAL INPUTS/OUTPUT 2 Input High Voltage, VIH 1.7 V Input Low Voltage, VIL 0.6 V Input Leakage Current, IIL 2 A Input Capacitance 4 10 pF VDD = 4.5 V to 5.5 V Output Low Voltage, VOL 0.4 V ISINK = 200 A Output High Voltage, VOH VDD – 1 V ISOURCE = 200 A VDD = 3 V to 3.6 V Output Low Voltage, VOL 0.4 V ISINK = 200 A Output High Voltage, VOH VDD – 0.5 V ISOURCE = 200 A DYNAMIC PERFORMANCE 2 Reference Multiplying Bandwidth 10 MHz VREF = ±3.5 V; DAC loaded all 1s Output Voltage Settling Time VREF = 10 V; RLOAD = 100 Ω, C LOAD = 15 pF AD5426 50 100 ns Measured to ±16 mV of full scale AD5432 55 110 ns Measured to ±4 mV of full scale AD5443 90 160 ns Measured to ± 1 mV of full scale Digital Delay 40 75 ns Interface Delay Time 10% to 90% Rise/Fall Time 15 30 ns Rise and fall time, VREF = 10 V, RLOAD = 100 Ω Digital-to-Analog Glitch Impulse 2 nV-s 1 LSB change around major carry, VREF = 0 V Multiplying Feedthrough Error DAC latch loaded with all 0s. VREF = ±3.5 V 70 dB 1 MHz 48 dB 10 MHz Output Capacitance IOUT22225pF All 0s loaded 10 12 pF All 1s loaded IOUT11217pF All 0s loaded 25 30 pF All 1s loaded Digital Feedthrough 0.1 nV-s Feedthrough to DAC output with SYNC high and alternate loading of all 0s and all 1s Total Harmonic Distortion –81 dB VREF = 3.5 V pk-pk; all 1s loaded, f = 1 kHz Digital THD Clock = 1 MHz 50 kHz fOUT 73 dB Output Noise Spectral Density 25 nV/ √Hz @ 1 kHz |
유사한 부품 번호 - AD5432 |
|
유사한 설명 - AD5432 |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |