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STFI15N95K5 데이터시트(PDF) 4 Page - STMicroelectronics |
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4 / 13 page Electrical characteristics STFI15N95K5 4/13 DocID029528 Rev 1 2 Electrical characteristics TC = 25 °C unless otherwise specified Table 5: On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 950 V IDSS Zero gate voltage drain current VDS = 950 V, VGS = 0 V 1 µA VDS = 950 V, VGS = 0 V TC = 125 °C(1) 50 µA IGSS Gate body leakage current VGS = ± 20 V, VDS = 0 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 6 A 0.41 0.50 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 855 - pF Coss Output capacitance - 65 - pF Crss Reverse transfer capacitance - 1 - pF Co(tr)(1) Equivalent capacitance time related VGS = 0 V, VDS = 0 to 760 V - 104 - pF Co(er)(2) Equivalent capacitance energy related 38 - pF Rg Intrinsic gate resistance f = 1 MHz open drain - 6 - Ω Qg Total gate charge VDD = 760 V, ID = 12 A VGS= 10 V (see Figure 16: "Test circuit for gate charge behavior") - 30 - nC Qgs Gate-source charge - 5 - nC Qgd Gate-drain charge - 22 - nC Notes: (1)Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS (2)Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD= 475 V, ID = 6 A, RG = 4.7 Ω VGS = 10 V (see Figure 15: "Test circuit for resistive load switching times" and Figure 18: "Unclamped inductive load test circuit") - 23 - ns tr Rise time - 20 - ns td(off) Turn-off delay time - 62 - ns tf Fall time - 11 - ns |
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