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Errata Details

1.

Description: Register modifications are required for operation in the frequency bands between

240

–320 MHz and 480–640 MHz with a temperature above 60 °C.

Impact: In extremely rare cases, the synthesizer will not lock in these bands when the device is operated at

a temperature above 60 °C.

The software workaround is only required for these frequency and

temperature ranges.

Workaround: Write 03h to register 59h and 02h to register 5Ah.

Resolution: Software workaround with register modification.

2.

Description: Incorrect nIRQ signal operation after shutdown (SDN) or initial power up.

Impacts: In a small percentage of cases after Shutdown (SDN) or initial power up the nIRQ signal can be

low during the Power-on-Reset (POR) period. Typically the nIRQ signal will be high during this period and

will exhibit a high to low transition at the expiration of the POR period. The interrupt status registers in 03h

and 04h will report the correct status of the POR and the nIRQ function is normal after the initial POR

period.

Workaround: The nIRQ line should not be monitored for POR after SDN or initial power up. The POR

signal is available by default on GPIO0 and GPIO1 and should be monitored as an alternative to nIRQ for

POR. A second potential workaround is also available by running a timer on the microcontroller after SDN

for 26 ms and then reading the interrupt status registers in 03h and 04h to check for POR and chip ready

(XTAL start-up/ready). After the initial interrupt is cleared the operation of the nIRQ pin will be normal.

Resolution: Will be fixed in the next revision.

3.

Description: This issue ONLY affects SLEEP mode when the low battery detection (LBD) function is

ENABLED (enlbd = 1 in Register 07h). Note that the LBD function is DISABLED by default.

If LBD is ENABLED, approximately 5% of devices will enter into a state that draws more current than

expected in SLEEP mode. Such devices will draw an average current of approximately 350 µA in SLEEP

mode versus the expected 1 µA. These devices will also report an inaccurate battery voltage level in

SLEEP mode.

The cause of the issue has been verified to be the improper reset of the LBD circuitry when in SLEEP

mode.

We strongly recommend all customers affected by this issue to implement one of the software workarounds

described below.

Impact: Affected devices will draw more current than expected in SLEEP mode which will reduce the

battery life of battery-backed products.

Workaround: If the low battery detection (LBD) function is not required during SLEEP mode, this issue can

be resolved by ensuring that LBD is DISABLED (enlbd = 0 in Register 07h).