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STEF05D 데이터시트(PDF) 10 Page - STMicroelectronics |
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STEF05D 데이터시트(HTML) 10 Page - STMicroelectronics |
10 / 19 page Typical application STEF05D 10/19 DocID024394 Rev 1 Equation 2 Where Cdv/dt is expressed in Farad, and the time t in seconds. Figure 5 shows a graphical explanation of delay time and ramp-up time. Figure 5. Delay time and VOUT ramp-up time 5.4 Enable/fault pin The Enable/Fault pin has the dual function of controlling the output of the device and, at the same time, of providing information about the device status to the application. When it is used, it should be connected to an external open-drain or open-collector device. In this case, when it is pulled at low logic level, it turns the output of the E-Fuse off. If this pin is left floating, since it has internal pull-up circuitry, the output of the E-Fuse is kept ON in normal operating conditions. In case of thermal fault, the pin is pulled to an intermediate state (Figure 6). This signal can be provided to a monitor circuit, informing it that a thermal shutdown has occurred, or it can be directly connected to the Enable/Fault pins of other STEFxx devices on the same application in order to achieve a simultaneous enable/disable feature. When a thermal fault occurs, the device can be reset either by cycling the supply voltage or by pulling down the Enable pin below the Vil threshold and then releasing it. C dvdt 36 10 9 – t30x10 12 – – = AM09870v1 0 1 2 3 4 5 6 Time EN/Fault VOUT delay time ramp-up time |
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