전자부품 데이터시트 검색엔진 |
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AD9886 데이터시트(PDF) 6 Page - Analog Devices |
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AD9886 데이터시트(HTML) 6 Page - Analog Devices |
6 / 32 page REV. 0 AD9886 –6– Table I. Complete Pinout List Pin Pin Pin Type Name Function Value Number Analog Video RAIN Analog Input for Converter R 0.0 V to 1.0 V 119 Inputs GAIN Analog Input for Converter G 0.0 V to 1.0 V 110 BAIN Analog Input for Converter B 0.0 V to 1.0 V 100 External HSYNC Horizontal SYNC Input 3.3 V CMOS 82 Sync/Clock VSYNC Vertical SYNC Input 3.3 V CMOS 81 Inputs SOGIN Input for Sync-on-Green 0.0 V to 1.0 V 108 CLAMP Clamp Input (External CLAMP Signal) 3.3 V CMOS 93 COAST PLL COAST Signal Input 3.3 V CMOS 84 CKEXT External Pixel Clock Input (to Bypass the PLL) or 10 k Ω to V DD 3.3 V CMOS 83 CKINV ADC Sampling Clock Invert 3.3 V CMOS 94 Sync Outputs HSOUT HSYNC Output Clock (Phase-Aligned with DATACK) 3.3 V CMOS 139 VSOUT VSYNC Output Clock (Phase-Aligned with DATACK) 3.3 V CMOS 138 SOGOUT Sync on Green Slicer Output 3.3 V CMOS 140 Voltage REFOUT Internal Reference Output (Bypass with 0.1 µF to Ground) 1.25 V 126 Reference REFIN Reference Input (1.25 V ± 10%) 1.25 ± 10% 125 Clamp Voltages RMIDSCV Red Channel Midscale Clamp Voltage Output 120 RCLAMPV Red Channel Midscale Clamp Voltage Output 0.0 V to 0.75 V 118 GMIDSCV Green Channel Midscale Clamp Voltage Output 111 GCLAMPV Green Channel Midscale Clamp Voltage Output 0.0 V to 0.75 V 109 BMIDSCV Blue Channel Midscale Clamp Voltage Output 101 BCLAMPV Blue Channel Midscale Clamp Voltage Output 0.0 V to 0.75 V 99 PLL Filter FILT Connection for External Filter Components for Internal PLL 78 Power Supply VD Analog Power Supply 3.3 V ± 10% VDD Output Power Supply 3.3 V ± 10% PVD PLL Power Supply 3.3 V ± 10% GND Ground 0 V Serial Port SDA Serial Port Data I/O 3.3 V CMOS 92 (2-Wire SCL Serial Port Data Clock (100 kHz max) 3.3 V CMOS 91 Serial Interface) A0 Serial Port Address Input 1 3.3 V CMOS 90 A1 Serial Port Address Input 2 3.3 V CMOS 89 Data Outputs Red B[7:0] Port B/Odd Outputs of Converter “Red,” Bit 7 Is the MSB 3.3 V CMOS 153–160 Green B[7:0] Port B/Odd Outputs of Converter “Green,” Bit 7 Is the MSB 3.3 V CMOS 13–20 Blue B[7:0] Port B/Odd Outputs of Converter “Blue,” Bit 7 Is the MSB 3.3 V CMOS 33–40 Red A[7:0] Port A/Even Outputs of Converter “Red,” Bit 7 Is the MSB 3.3 V CMOS 143–150 Green A[7:0] Port A/Even Outputs of Converter “Green,” Bit 7 Is the MSB 3.3 V CMOS 3–10 Blue A[7:0] Port A/Even Outputs of Converter “Blue,” Bit 7 Is the MSB 3.3 V CMOS 23–30 Data Clock DATACK Data Output Clock for the Analog and Digital Interface 3.3 V CMOS 134 Outputs DATACK Data Output Clock Complement for the Analog Interface Only 3.3 V CMOS 135 Sync Detect SCDT Sync Detect Output 3.3 V CMOS 136 Scan Function SCANIN Input for SCAN Function 3.3 V CMOS 129 SCANOUT Output for SCAN Function 3.3 V CMOS 45 SCANCLK Clock for SCAN Function 3.3 V CMOS 50 No Connect NC These Pins Should be Left Unconnected 46–49, 53, 56, 57, 59, 60, 62, 63, 65, 66, 71–73, 137 |
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