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PLQP0064GA-A 데이터시트(PDF) 46 Page - Renesas Technology Corp

부품명 PLQP0064GA-A
상세설명  32-MHz, 32-bit RX MCUs, 50 DMIPS, up to 128-KB flash memory
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PLQP0064GA-A 데이터시트(HTML) 46 Page - Renesas Technology Corp

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R01DS0273EJ0100 Rev.1.00
Page 46 of 116
Oct 30, 2015
RX130 Group
5. Electrical Characteristics
Note 1. Supply current values do not include output charge/discharge current from all pins. The values apply when internal pull-up
MOSs are in the off state.
Note 2. Clock supply to the peripheral functions is stopped. This does not include BGO operation. The clock source is PLL. FCLK and
PCLK are set to divided by 64.
Note 3. Clocks are supplied to the peripheral functions. This does not include BGO operation. The clock source is PLL. FCLK and PCLK
are set to the same frequency as ICLK.
Note 4. Values when VCC = 3.3 V.
Note 5. This is the increase for programming or erasure of the ROM or E2 DataFlash during program execution.
Note 6. Clock supply to the peripheral function is stopped. The clock source is PLL when ICLK is 12 MHz, HOCO when ICLK is 8 MHz,
and LOCO otherwise. FCLK and PCLK are set to divided by 64.
Note 7. Clocks are supplied to the peripheral functions. The clock source is PLL when ICLK is 12 MHz, HOCO when ICLK is ( MHz, and
LOCO otherwise. FCLK and PCLK are set to the same frequency as ICLK.
Note 8. Clock supply to the peripheral functions is stopped. The clock source is the sub-clock oscillator. FCLK and PCLK are set to
divided by 64.
Note 9. Clocks are supplied to the peripheral functions. The clock source is the sub-clock oscillator. FCLK and PCLK are set to the
same frequency as ICLK.
Note 10. Values when the MSTPCRA.MSTPA17 bit (12-bit A/D converter module stop bit) is set to “transition to the module stop state is
made”.
Supply
current*1
Middle-speed
operating
modes
Deep sleep
mode
No peripheral
operation*6
ICLK = 12 MHz
ICC
1.0
mA
ICLK = 8 MHz
0.7
ICLK = 4 MHz
0.2
ICLK = 1 MHz
0.1
All peripheral
operation: Normal*7
ICLK = 12 MHz
2.3
ICLK = 8 MHz
1.6
ICLK = 4 MHz
1.0
ICLK = 1 MHz
0.7
Increase during flash rewrite*5
2.5
Low-speed
operating
mode
Normal
operating
mode
No peripheral
operation*8
ICLK = 32.768 kHz
ICC
3.8
μA
All peripheral opera-
tion: Normal*10
ICLK = 32.768 kHz
10.9
All peripheral
operation: Max.*10
ICLK = 32.768 kHz
29.2
Sleep mode
No peripheral
operation*8
ICLK = 32.768 kHz
2.1
All peripheral opera-
tion: Normal*9
ICLK = 32.768 kHz
6.0
Deep sleep
mode
No peripheral
operation*8
ICLK = 32.768 kHz
1.6
All peripheral
operation: Normal*9
ICLK = 32.768 kHz
5.0
Item
Symbol
Typ.
Max.
Unit
Test
Conditions


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