전자부품 데이터시트 검색엔진 |
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PLQP0064GA-A 데이터시트(PDF) 72 Page - Renesas Technology Corp |
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PLQP0064GA-A 데이터시트(HTML) 72 Page - Renesas Technology Corp |
72 / 116 page R01DS0273EJ0100 Rev.1.00 Page 72 of 116 Oct 30, 2015 RX130 Group 5. Electrical Characteristics 5.3.4 Control Signal Timing Note: 200 ns minimum in software standby mode. Note 1. tPcyc indicates the cycle of PCLKB. Note 2. tNMICK indicates the cycle of the NMI digital filter sampling clock. Note 3. tIRQCK indicates the cycle of the IRQi digital filter sampling clock (i = 0 to 7). Figure 5.34 NMI Interrupt Input Timing Figure 5.35 IRQ Interrupt Input Timing Table 5.30 Control Signal Timing Conditions: 1.8V ≤ VCC = AVCC0 < 2.0V, 2.0V ≤ VCC ≤ 5.5V, 2.0V ≤ AVCC0 ≤ 5.5V, VSS = AVSS0 = 0V, Ta = –40 to +105°C Item Symbol Min. Typ. Max. Unit Test Conditions NMI pulse width tNMIW 200 — — ns NMI digital filter disabled (NMIFLTE.NFLTEN = 0) tPcyc × 2 ≤ 200 ns tPcyc × 2*1 —— tPcyc × 2 > 200 ns 200 — — NMI digital filter enabled (NMIFLTE.NFLTEN = 1) tNMICK × 3 ≤ 200 ns tNMICK × 3.5*2 —— tNMICK × 3 > 200 ns IRQ pulse width tIRQW 200 — — ns IRQ digital filter disabled (IRQFLTE0.FLTENi = 0) tPcyc × 2 ≤ 200 ns tPcyc × 2*1 —— tPcyc × 2 > 200 ns 200 — — IRQ digital filter enabled (IRQFLTE0.FLTENi = 1) tIRQCK × 3 ≤ 200 ns tIRQCK × 3.5*3 —— tIRQCK × 3 > 200 ns NMI tNMIW IRQ tIRQW |
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