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TPD2E001DRST-NM 데이터시트(PDF) 4 Page - Texas Instruments

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부품명 TPD2E001DRST-NM
상세설명  Low-Capacitance 2-Channel ESD-Protection for High-Speed Data Interfaces
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TPD2E001DRST-NM 데이터시트(HTML) 4 Page - Texas Instruments

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TPD2E001
SLLS684I – JULY 2006 – REVISED MARCH 2016
www.ti.com
Product Folder Links: TPD2E001
Submit Documentation Feedback
Copyright © 2006–2016, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute-maximum-rating conditions for extended periods may affect device reliability.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VCC
Power pin voltage
–0.3
7
V
VIO
IO pin voltage
–0.3
VCC + 0.3
V
TJ
Junction temperature
150
°C
Bump temperature (soldering)
Infrared (15 s)
220
°C
Vapor phase (60 s)
215
Lead temperature (soldering, 10 s)
300
°C
Tstg
Storage temperature
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±15000
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins(2)
±1000
6.3 ESD Ratings: Surge Protection
VALUE
UNIT
V(ESD)
Electrostatic
discharge
IEC 61000-4-2 contact
±8000
V
IEC 61000-4-2 air-gap discharge
±15000
6.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
TA, operating free-air temperature
–40
85
°C
Operating voltage
VCC pin
0.9
5.5
V
IO1, IO2 pins
0
VCC
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Thermal Information
THERMAL METRIC(1)
TPD2E001
UNIT
DRY (USON)
DRL (SOT)
DRS (WSON)
DZD (SOP)
5 PINS
5 PINS
6 PINS
4 PINS
RθJA
Junction-to-ambient thermal resistance
374.2
257.6
91.9
213.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
223.4
97.6
106.9
93.5
°C/W
RθJB
Junction-to-board thermal resistance
227.8
74.2
64.8
56.8
°C/W
ψJT
Junction-to-top characterization parameter
52.9
7.5
10.2
4.2
°C/W
ψJB
Junction-to-board characterization parameter
224.8
73.7
64.9
56.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
87.5
N/A
29.9
N/A
°C/W


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