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GS8673ED36BK-675I 데이터시트(PDF) 11 Page - GSI Technology

부품명 GS8673ED36BK-675I
상세설명  On-Chip ECC with virtually zero SER
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제조업체  GSI [GSI Technology]
홈페이지  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8673ED36BK-675I 데이터시트(HTML) 11 Page - GSI Technology

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GS8673ED18/36BK-675/625/550/500
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.06 5/2012
11/31
© 2011, GSI Technology
LP NOP Timing Diagram
.
Write1
NOP1
NOP2
NOP3
NOP4
NOP5
NOP6
NOP7
NOP8
Write2
tKHDZTV(max)
tKHDZTV(min)
tKHAZTV(max)
tKHAZTV(min)
Note 5
Note 1
Note 2
Note 3
Note 4
CK, KD
CK, KD
SA
R
W
ADZT1
D
Notes:
1. The Controller initiates Write1. The ECCRAM is enabling SA and D termination.
2. The Controller initiates one NOP (NOP1) with ADZT1 Low, to allow time for Write1 to complete.
The Controller drives SA, D Low during NOP1 ~ NOP8.
3. The Controller initiates two more NOPs (NOP2 ~ NOP3) with ADZT1 High, to cause the ECCRAM to enter LP NOP mode for 2 cycles.
The ECCRAM disables SA and D termination pull ups at
↑CK in NOP4, 2 cycles after sampling ADZT1 = 1 at ↑CK in NOP2.
4. The Controller initiates five more NOPs (NOP4 ~ NOP8) with ADZT1 Low, to allow time for the ECCRAM to exit LP NOP Mode.
The ECCRAM enables SA and D termination pull ups at
↑CK in NOP6, 2 cycles after sampling ADZT1 = 0 at ↑CK in NOP4.
5. The Controller initiates Write2. The ECCRAM is enabling SA and D termination.


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