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AD5241BR10 데이터시트(PDF) 4 Page - Analog Devices |
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AD5241BR10 데이터시트(HTML) 4 Page - Analog Devices |
4 / 16 page REV. B AD5241/AD5242 –4– ABSOLUTE MAXIMUM RATINGS* (TA = 25 °C, unless otherwise noted.) VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V , –7 V VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V VA, VB, VW to GND . . . . . . . . . . . . . . . . . . . . . . . . . . VSS, VDD AX–BX, AX–WX, BX–WX at 10 k Ω in TSSOP-14 . . . ±5.0 mA* AX–BX, AX–WX, BX–WX at 100 k Ω in TSSOP-14 . . ±1.5 mA* AX–BX, AX–WX, BX–WX at 1 M Ω in TSSOP-14 . . . ±0.5 mA* Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . 0 V, 7 V Operating Temperature Range . . . . . . . . . . –40 °C to +105°C Thermal Resistance θ JA SOIC (SOIC-14) . . . . . . . . . . . . . . . . . . . . . . . . . 158 °C/W SOIC (SOIC-16) . . . . . . . . . . . . . . . . . . . . . . . . . . 73 °C/W TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206 °C/W TSSOP-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180 °C/W Maximum Junction Temperature (TJ max) . . . . . . . . . . 150 °C Package Power Dissipation PD = (TJ max – TA)/ θ JA Storage Temperature . . . . . . . . . . . . . . . . . . –65 °C to +150°C Lead Temperatures R-14, R-16A, RU-14, RU-16 (Vapor Phase, 60 sec) . 215 °C R-14, R-16A, RU-14, RU-16 (Infrared, 15 sec) . . . . . 220 °C *Max current increases at lower resistance and different packages. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD5241/AD5242 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE ORDERING GUIDE Number of Number of End to End Temperature Package Package Devices per Model Channels RAB ( ) Range ( C) Description Option Container AD5241BR10 1 10 k –40 to +105 SOIC-14 R-14 56 AD5241BR10-REEL7 1 10 k –40 to +105 SOIC-14 R-14 1000 AD5241BRU10-REEL7 1 10 k –40 to +105 TSSOP-14 RU-14 1000 AD5241BR100 1 100 k –40 to +105 SOIC-14 R-14 56 AD5241BR100-REEL7 1 100 k –40 to +105 SOIC-14 R-14 1000 AD5241BRU100-REEL7 1 100 k –40 to +105 TSSOP-14 RU-14 1000 AD5241BR1M 1 1 M –40 to +105 SOIC-14 R-14 56 AD5241BRU1M-REEL7 1 1 M –40 to +105 TSSOP-14 RU-14 1000 AD5242BR10 2 10 k –40 to +105 SOIC-16 R-16A 48 AD5242BR10-REEL7 2 10 k –40 to +105 SOIC-16 R-16A 1000 AD5242BRU10-REEL7 2 10 k –40 to +105 TSSOP-16 RU-16 1000 AD5242BR100 2 100 k –40 to +105 SOIC-16 R-16A 48 AD5242BR100-REEL7 2 100 k –40 to +105 SOIC-16 R-16A 1000 AD5242BRU100-REEL7 2 100 k –40 to +105 TSSOP-16 RU-16 1000 AD5242BR1M 2 1 M –40 to +105 SOIC-16 R-16A 48 AD5242BRU1M-REEL7 2 1 M –40 to +105 TSSOP-16 RU-16 1000 NOTES 1The AD5241/AD5242 die size is 69 mil × 78 mil, 5,382 sq. mil. Contains 386 transistors for each channel. Patent Number 5495245 applies. 2TSSOP packaged units are only available in 1,000-piece quantity Tape and Reel. |
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