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CS2082EDW20 데이터시트(PDF) 7 Page - ON Semiconductor

부품명 CS2082EDW20
상세설명  Dual Airbag Deployment ASIC
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제조업체  ONSEMI [ON Semiconductor]
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Each SHx pin is pulled up to VBAT while each SLx pin is
pulled down to GND through separate nominal 10 k
resistors, thus biasing each normal fire path to about 1/2
VBAT. An open fire path has been detected if both the SBx
and SGx bits are set for that path. To detect faults between
fire paths and to test driver function, each driver should be
activated individually. The activated driver should cause its
respective fault bit to be set. If an activated driver does not
set its respective fault bit, a driver fault has been detected. If
an activated driver causes the fault bit of an inactivated
driver to be set, a fault between fire paths has been detected.
Table 4 defines the implied ranges over which the various
types of faults can be detected.
Table 4. Implied Resistive Fault Detection Ranges
Fault
Min
Nom
Max
Unit
Short to Ground
1
5
10
k
Short to Battery
1
5
10
k
Open
5
20
40
k
Driver Open
1
5
10
k
Driver Shorted
1
5
10
k
Squib to Squib
1
5
10
k
Squib Resistance Measurement – $3d
The
$3d
command
activates
squib
resistance
measurement for the selected firing path. The respective
active–high bit definitions are shown in Table 5. At
power–up, the default path is ‘None.’
Table 5. Squib Resistance Path Select
D3
D2
D1
D0
Path
x
x
0
0
NONE
x
x
0
1
SQUIB 1
x
x
1
0
SQUIB 2
x
x
1
1
NONE
Squib resistance is measured by forcing 50 mV nominal
(proportional to VCC) across the squib. The resulting squib
current is passed to an external load resistor at the MR pin,
converting the current back into a voltage. This voltage may
be read directly at the MR pin, or passed through the analog
multiplexer to be read at the AOUT pin. The known values of
the squib differential voltage (VDIFF) and the MR resistance
(RMR), and the measured MR voltage (VMR) indicate squib
resistance such that:
RSQUIB +
RMR
VDIFF
VMR
Typical MR voltage response for RMR = 50 Ω over a squib
resistance range of 0.6
Ω to 6.0 Ω is illustrated in Figure 2.
Figure 2. Typical MR Voltage Response
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.6
1.4
2.2
3.0
3.8
4.6
5.4
RSQUIB
Measurement accuracy of the CS2082 with combined
tolerances and with and external 1% load resistor at the MR
pin can be defined by the equation:
RSQ(E) +
VDIFF(IDEAL)
RMR(IDEAL)
VDIFF"12%
RSQ(A)
" 1%
RMR " 1%
+ RSQ(A))12.5% *15.94%
where VDIFF(IDEAL) and RMR(IDEAL) are the assumed
values for the squib resistance solution algorithm, RSQ(A) is
the actual squib resistance, and RSQ(E) is the result of the
solution algorithm. An additional error may be added if the
MR voltage is measured through the analog multiplexer.
In operation, current is sourced from VBAT to the SHx pin,
through the squib to the SLx pin, and returned to ground
through the MR load resistor. Current clamps are provided
for both the SHx and SLx pins and a voltage clamp is
provided for the MR pin. These clamps along with the
resolution of the ADC are the constraining factors for the
minimum and maximum measurable squib resistance
values.
The minimum measurable squib resistance can be defined
as:
VDIFF(MIN)
ILIM(MAX)
v RSQUIB(MIN) v
VDIFF(MIN)
RMR(MIN)
VCLAMP(MAX)
The maximum measurable squib resistance can be
defined as:
RSQUIB(MAX) +
VDIFF(MAX)
RMR(MAX)
(2n
* 1)
VCC(MIN)
In the above equations, VDIFF is the SHx–SLx forced
differential voltage, ILIM is the SHx resistive measure
current limit, VCLAMP is the MR clamp voltage, RMR is the
toleranced MR load resistor value and n is the number of bits
of resolution of the ADC.
It should be noted that during resistive measurements,
faults to GND or BAT (dependent on VBAT voltage and


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