전자부품 데이터시트 검색엔진 |
|
TPPM0111DWP 데이터시트(PDF) 10 Page - Texas Instruments |
|
|
TPPM0111DWP 데이터시트(HTML) 10 Page - Texas Instruments |
10 / 10 page TPPM0111 DUAL LOW-DROPOUT LINEAR REGULATOR SLVS414 – DECEMBER 2001 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION packaging To maximize the efficiency of this package for application on a single layer or multilayer PCB, certain guidelines must be followed. The following information is to be used as a guideline only. For further information, refer to the PowerPAD concept implementation document. multilayer PCB The following are guidelines for mounting the PowerPAD IC on a multilayer PCB with a ground plane. Solid Pad (Land Pattern) Package Thermal Pad Thermal Vias Via = 0,33 mm Diameter Minimum Pitch Between Vias is 1,52 mm Package Outline Figure 7. Package and Land Configuration for a Multilayer PCB 4 Plane 0,18 mm (Square) Package Solder Pad Component Traces Thermal Via Thermal Isolation Power Plane Only Package Solder Pad (Bottom Trace) 2 Plane 1,5038 – 1,5748 mm Component Trace (2 oz Cu) 1,0142 – 1,0502 mm Ground Plane (1 oz Cu) 0,5246 – 0,5606 mm Power Plane (1 oz Cu) 0 – 0,071 mm Board Base and Bottom Pad 1,5748 mm Figure 8. Multilayer Board (Side View) |
유사한 부품 번호 - TPPM0111DWP |
|
유사한 설명 - TPPM0111DWP |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |