Data Sheet

AD7193

Rev. E | Page 7 of 56

Parameter

Min

Typ

Max

Unit

Data Output Coding

Offset binary

Full-Scale Calibration Limit

1.05 × FS

V

Zero-Scale Calibration

Limit

−1.05 × FS

V

Input Span

0.8 × FS

2.1 × FS

V

Power Supply Voltage

3

5.25

V

2.7

5.25

V

Power Supply Currents

0.85

1

mA

Gain = 1, buffer off

1

1.25

mA

Gain = 1, buffer on

2.8

3.6

mA

Gain = 8, buffer off

3.2

3.9

mA

Gain = 8, buffer on

3.8

4.7

mA

Gain = 16 to 128, buffer off

4.3

5.3

mA

Gain = 16 to 128, buffer on

0.35

0.4

mA

0.5

0.6

mA

1.5

mA

External crystal used

3

µA

Power-down mode

1

Temperature range: −40°C to +105°C.

2

Specification is not production tested but is supported by characterization data at initial product release.

3

FS[9:0] is the decimal equivalent of Bit FS9 to Bit FS0 in the mode register.

4

Following a system or internal zero-scale calibration, the offset error is in the order of the noise for the programmed gain and output data rate selected. A system full-

scale calibration reduces the gain error to the order of the noise for the programmed gain and output data rate.

5

The analog inputs are configured for differential mode.

6

REJ60 is a bit in the mode register. When the first notch of the sinc filter is at 50 Hz, a notch is placed at 60 Hz when REJ60 is set to 1. This gives simultaneous

50 Hz/60 Hz rejection.

7